1. Field of the Invention
The present invention relates to a digital video signal processing apparatus adapted for use in a digital video tape recorder (VTR) operating with color video signals that are in a component format.
2. Description of the Prior Art
It is known, in a digital video tape recorder of the D-1 format (4:2:2format) (hereinafter referred to as D-1 VTR) which is designed to produce component video signals separated into a luminous signal Y and color difference or chrominance signals CB and CR, to have a system clock frequency f.sub.ck and signal sampling frequencies f.sub.sy, f.sub.sb, f.sub.sr as given below, and the numbers of effective samples (data quantities N.sub.sy, N.sub.sb, N.sub.sr per line of the individual signals are in a ratio of 4:2:2 as follows. ##EQU1##
In applying such a D-1 VTR to the recently proposed wide-screen television system, it has been customary heretofore to prevent geometric distortion of a reproduced image merely by compressing or extending the time base.
However, with such compression or extension of the time base, the resolution of the reproduced image is reduced by the ratio Arn/Arw of the standard and wide-angle aspects.
For the purpose of compensating for the reduction of the resolution, it has been proposed to provide a larger number of effective samples per line, as disclosed for example in Japanese Patent Laid-open No. Sho 51 (1976)-018418. According to this proposal, video signals are sampled alternately by a pair of sampling circuits and are then recorded on a recording medium in a manner to form multiple channels, and subsequently the multichannel sample signals reproduced from the recording medium are combined with each other to produce a wide-band signal.
However, if the number of effective samples is increased, naturally the quantity of data is also increased so that proper data processing cannot be accomplished by any of the currently available digital VTRs based on the 4:2:2 format.
In an attempt to solve the problem of the data quantity, the present applicant proposed a multichannel digital video signal recording/playback apparatus as disclosed in Japanese Patent Application No. Hei 1 (1989)-339231. In this apparatus, high-resolution digital video signals of an 8:4:4 format, where the number of pixels is twice the number in the video signals of a 4:2:2 format, are distributed to two channels alternately per sample in such a manner that the order of distribution is inverted every field, and the video signals are recorded by two digital VTRs of the 4:2:2 format. Thereafter the signals reproduced by such digital VTRs are combined with each other to obtain the original high-resolution digital video signals, whereby the data quantity in each channel is rendered equal to that of the current 4:2:2 format while preventing geometric distortion of the reproduced image and reduction of the resolution.
In distributing and combining the digital video signals in the manner mentioned, it follows that, as seen from the digital VTRs, data rate reduction and interpolation are respective executed with regard to the input and output signals.
Generally, in reducing the data rate of the digital video signals by a half, the signal band is limited to be narrower than a half width by a digital low pass filter so as to prevent aliasing. The filter is of a finite impulse response (FIR) type where the coefficients are symmetrical, and has such characteristic that, if it is a half-band low pass filter capable of satisfying the first Nyquist criterion the center coefficient thereof is 0.5 (to the reference value) while alternate coefficients other than the center coefficient become zero.
The characteristic of such half-band low pass filter is expressed by Eq. (1) as follows: ##EQU2##
The amplitude characteristic is such that a value -6 dB is obtained at 1/4 of the input signal sampling frequency f.sub.s.
In an exemplary case of 10-bit data, the coefficient distribution (coefficient profile) of the filter is symmetrical with respect to the center as shown in FIG. 12 and Table 1, and even coefficients become zero with the exception of the center coefficient k.sub.0.
TABLE 1 ______________________________________ k.sub.0 (Half reference value) 512 k.sub.1 k.sub.-1 324 k.sub.2 k.sub.-2 0 k.sub.3 k.sub.-3 -102 k.sub.4 k.sub.-4 0 k.sub.5 k.sub.-5 54 k.sub.6 k.sub.-6 0 k.sub.7 k.sub.-7 -32 k.sub.8 k.sub.-8 0 k.sub.9 k.sub.-9 19 k.sub.10 k.sub.-10 0 k.sub.11 k.sub.-11 -11 k.sub.12 k.sub.-12 0 k.sub.13 k.sub.-13 6 k.sub.14 k.sub.-14 0 l.sub.15 k.sub.-15 -3 k.sub.16 k.sub.-16 0 k.sub.17 k.sub.-17 1 ______________________________________
The above half-band low pass filter is generally so composed as shown in FIG. 13.
In the half-band low pass filter 10L of FIG. 13, a multiplicity of unitary delay lines (registers) 11.sub.1, 11.sub.2 . . . 11.sub.2n ; 11.sub.-1, 11.sub.-2 . . . 11.sub.-2n, whose delay time .tau.s is equal to the input signal sampling frequency, are connected in series between an input terminal IN and an output terminal OF where a point P is at the center. A ROM 13.sub.0 storing the center coefficient k.sub.0 therein is connected to a multiplier 12.sub.0 which is connected to the point P (center tap), and multipliers 12.sub.1, 12.sub.3 . . . 12.sub.2n-1 are connected to the outputs of odd-numbered delay lines 11.sub.1, 11.sub.3 . . . 11.sub.2n-1 arranged from the point P toward the terminal OF, while the output taps of even-numbered delay lines 11.sub.2 . . . 11.sub.2n-2 are left unconnected. Multipliers 12.sub.-1, 12.sub.-3 . . . 12.sub.1-2n are connected to the inputs of the odd-numbered delay lines 11.sub.-1, 11.sub.-3 . . . 11.sub.1-2n sequentially toward the input terminal IN in a manner to be symmetrical to the above with respect to the point P, while the input taps of the even-numbered delay lines 11.sub.-2 . . . 11.sub.2-2n are left unconnected.
ROMs 13.sub.1, 13.sub.3 . . . 13.sub.2n-1, 13.sub.-1, 13.sub.-3 . . . 13.sub.1-2n storing the coefficients therein are connected respectively to the multipliers 12.sub.1, 12.sub.3 . . . 12.sub.2n-1 ; 12.sub.-1, 12.sub.-3 . . . 12.sub.1-2n, and the outputs of all the multipliers 12 are added to one another in an adder 14 and then are delivered to an output terminal OS.
In producing a pair of chrominance signals of the 4:2:2 format by reducing the data rate of the aforementioned video chrominance signals CB, CR of the 8:4:4 format, there is executed, according to a simple concept, a process of limiting the band width for each of the signals CB and CR.
Therefore, two of the above half-band low pass filters are required in the conventional apparatus which tends to complicate the circuit design.
Since chrominance signals of the 8:4:4 format are premised on two-channel distribution as in the cited proposal, a pair of signals CB and CR are multiplexed in two channels as shown in FIGS. 5A and 5B which will be described later, so that the band limiting process is executed after such signals are demultiplexed, further complicating the circuit design.
Moreover, in producing a pair of chrominance signals of the 8:4:4 format by interpolating chrominance signals CB, CR of the 4:2:2 format, two digital filters are required as in the case of data rate reduction, leading to further complication of the circuit design.
In addition, to accomplish the two-channel distribution as disclosed in the cited proposal, multiplexing is required before distribution, leading to further complications in the design.